Medipix4
Learn about the Medipix4 Collaboration
Up until now it has been possible to make pixel detector read-out chips that can be abutted on three sides only. The fourth side is used for on-chip peripheral logic and wire-bond pads that permit electronic read-out. Because of this structure, large detector areas can be covered, but only with gaps in the coverage, or by using sophisticated roof-tile mechanics. Through-silicon-via (TSV) technology provides the possibility of reading the chips through copper-filled holes that bring the signals from the front side of the chip to its rear. Developments based on the Medipix3 chips have demonstrated that this has now become a viable option for pixel detector read-out. However, the TSV processing of Medipix3 only allows a reduction in the peripheral area by avoiding the use of wire bonds. The peripheral logic is still present.
The Medipix4 Collaboration launched in 2016. The aim of the collaboration is designing pixel read-out chips that for the first time are fully prepared for TSV processing and may be tiled on all four sides. In other words, all of the communication with the pixel matrix will now go through the rear of the chip - the peripheral logic and control elements will be integrated inside the pixel matrix. This will not only enable large areas to be covered seamlessly, but will also permit the development of new read-out architectures by avoiding the need to send all of the data to one side of the chip for read-out.
Two new chips are foreseen: Medipix4, which will target spectroscopic X-ray imaging at rates compatible with medical CT scans, and Timepix4, which will provide particle identification and tracking with higher spatial and timing precision.
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Key Facts
Collaboration Partners: View page
Intellectual Property Status:
Technology under development.
Relevant documents:
The Timepix4 Chip
Timepix4 is a programmable general purpose hybrid pixel detector readout ASIC, with a larger chip area and improved time stamp precision and hit rate capability in comparison to its predecessor, Timepix3. The Timepix4 ASIC consists of a matrix of 448 x 512 pixels with a pixel pitch of 55μm. By utilising Through-Silicon-Via (TSV) technology, the ASIC has been designed to be 4-side buttable, permitting almost seamless tiling on all 4 sides. The detector can be applied to a wide range of applications including X-ray imaging, particle tracking and material analysis.
One can choose between several data acquisition modes depending on the application requirement. In data driven mode, the arrival time (Time-of-Arrival – ToA) and charge deposit information (Time-over-Threshold – ToT), as well as coordinates of the active pixel, are provided for each hit. For imaging applications and for calibration, the ASIC can be operated in frame-based mode in either continuous read/write or sequential read/write mode.
Features:
- Pixel size 55μm x 55μm.
- 512 x 448 pixels.
- Readout dead-time-free modes.
- Data-driven or frame-based (sequential or continuous read/write) readout.
- Large sensitive area (6.93 cm2) with almost no dead area (<0.5%).
- Larger chip area and improved time stamp precision and hit rate capability compared to Timepix3.
- 4-side buttable: 3x ‘hidden’ periphery TSV/IO.
Applications:
- X-ray and neutron imaging
- Particle track reconstruction
- Electron detectors
- Material analysis
- Synchrotrons
General | |
---|---|
CMOS |
65nm |
Pixel size |
55μm x 55μm |
Pixel matrix |
512 x 448 |
Time resolution |
~200ps |
Charge measurement |
Noise: 80e- rms, Range: 200ke |
Minimum operating threshold |
~500e- |
Hit arrival timing (ToA) |
LSB=195ps, range: 1.638ms |
Readout bandwidth |
20.48 Gbps (4x 5.12 Gbps) |
Interface |
3x 147 I/O TSV/Wirebond |
Power supply voltage |
1.2V |
Power consumption |
~3.5W |
Readout modes | |||
---|---|---|---|
Tracking (data driven) |
Imaging (frame-based) |
||
Mode |
ToT & ToA |
Mode |
CRW: Pixel Counter (6/16-bit) |
Data |
64-bit per hit |
Frame rate |
Up to 89kFPS |
Max hit rate |
3.58x106 hits/mm2/s (10.8 KHz / pixel) |
Max hit rate |
~ 5 x 109 hits/mm2/s |
The Medipix4 Chip (in development)
The Medipix4 ASIC is a CMOS pixel detector read-out chip working in single counting mode. It is designed to be combined with different semiconductor sensors depending on the applications, to convert X-rays into detectable electric signals. Medipix4 permits colour imaging and dead-time-free operation, and can be used in a range of X-ray, gamma and visible light imaging applications. Unlike the previous iterations of Medipix, the Medipix4 ASIC is 4-side buttable, permitting large area seamless tiling on all 4 sides by utilising Through-Silicon-Via (TSV) technology.
Features:
- Available in Fine Pitch Mode (sensor pixel pitch = readout pixel pitch) and Spectroscopic Mode (sensor pixel pitch = 2 x readout pixel pitch).
- High gain mode (low linearity and lower noise) and low gain mode.
- Single pixel and charge summing acquisition modes.
- Sequential or continuous read/write readout architecture.
- Inter-pixel architecture to correct charge sharing and fluorescence photons.
- 4-side buttable (TSV).
Applications:
- Adaptive optics and other visible or near visible light
- Astrophysics
- Dosimetry
- Electron microscopy
- Life sciences
- Non-destructive testing
General | |
---|---|
CMOS technology | 0.13μm |
Pixel size |
FPM: 75μm x 75μm SM: 150μm x 150μm |
Pixel matrix |
FPM: 320 x 320 SM: 160 x 160 |
Signal polarity | Negative |
Sensitive area |
5.76cm² |
Maximum count rate in SM-CSM |
2.5 x 107 photons.mm−2s −1 |
Energy resolution |
2.5KeV (FWHM, CdTe, CSM, 60keV) |
Equivalent Noise Charge |
~100e- |
Minimum operating threshold |
~560e- (SPM) ~930e- (CSM) |
Maximum off-chip data rate |
4.8Gb/s |
Dynamic range |
154keV, CdTe |
Pixel counters in continuous read-write |
FPM: 2 x [1 or 12] bits SM: 8 x [1 or 12] bits |
Pixel counters in sequential read-write |
FPM: 2 x [1, 2, 12, 24] bits SM: 8 x [1, 2, 12, 24] bits |
Power supply voltage |
1.2V |
Power density consumption |
FPM–SPM: 0.45W/cm2 FPM–CSM: 0.56W/cm2 SM–SPM: 0.23W/cm2 SM–CSM: 0.28W/cm2 |
Relevant Documents:
- Timepix4: Llopart, X., Alozy, J., Ballabriga, R., Campbell, M., Casanova, R., Gromov, V., Heijne, E.H.M., Poikela, T., Santin, E., Sriskaran, V., Tlustos, L., & Vitkovskiy, A. (2022). Timepix4, a large area pixel detector readout chip which can be tiled on 4 sides providing sub-200 ps timestamp binning. Journal of Instrumentation, Vol.17, January 2022 https://iopscience.iop.org/article/10.1088/1748-0221/17/01/C01044#references
- Medipix4: Sriskaran, V., Alozy, J., Ballabriga, R., Campbell, M., Christodoulou, P., Heijne, E., Koukab, A., Kugathasan, T., Llopart, X., Piller, M., Pulli, A., Sallese, J.-M., & Tlustos, L. (2024). High-rate, high-resolution single photon X-ray imaging: Medipix4, a large 4-side buttable pixel readout chip with high granularity and spectroscopic capabilities. Journal of Instrumentation, Vol.19, February 2024 https://iopscience.iop.org/article/10.1088/1748-0221/19/02/P02024/meta