Medipix2 Collaboration
Learn about the Medipix2 Collaboration
The Medipix2 Collaboration was formed in 1999 with the aim of developing a single photon counting pixel detector readout chip using a 0.25 μm CMOS process. The work of the Collaboration was initially foreseen to take four years, it is still active now almost two decades later. A major reason for this is the number and variety of applications to which the technology has been applied. Moreover, the development and immediate success of the Timepix chip in 2006 has led to a second wave of applications.
There are two chips deriving from the Medipix2 Collaboration, the Medipix2 chip and the Timepix chip.
The Medipix2 Chip
The Medipix2 ASIC, the successor of the Medipix1 chip, is a high spatial, high contrast resolving CMOS pixel read-out chip working in single photon counting mode. It benefits from the quick progress of CMOS technology which allows enhanced functionality of the pixel cell at the same time as providing a significant reduction in pixel size. The chip can be combined with different semiconductor sensors which convert the X-rays directly into detectable electric signals. This represents a new solution for various X-ray and gamma-ray imaging applications.
Features:
- Pixel size 55μm x 55μm
- 256 x 256 pixels
- 2 thresholds for window discrimination (adjustable per pixel with 3 bits each)
- Single particle counting
- Electron or hole collection -> compatible with various sensor materials
- Can be combined with Gas Gain Grid to readout electron deposition in a gas detector
- 3-side buttable
Applications:
- Adaptive optics and other visible or near visible light applications
- Astrophysics
- Digital Autoradiography
- Education
- Electron microscopy
- Life Sciences
- Neutron imaging
- Various X-ray and gamma-ray imaging applications
- X-ray polarimetry measurements
General | |
---|---|
CMOS technology | 0.25μm |
Pixel size | 55μm x 55μm |
Pixel matrix | 256 x 256 |
Design | CERN |
Analog front end (pixel cell) | |
---|---|
Positive and negative signal polarity | |
Leakage current | -10nA to +20nA |
Time to peak | 100ns |
Noise | 100 e- rms |
Threshold variation (after tuning) | 35 e- rms |
Minimum operating treshold | 700 e- |
Digital part (pixel cell + periphery) | |
---|---|
1 counter / shift register | 14 bits (stops at 11810 counts) |
Periphery |
|
Total analog power consumption (nominal conditions) | 440mW |
Total digital power consumption (@100MHz) | 450mW |
The Timepix Chip
The Timepix chip evolved from the Medipix2 development. The pixels have identical size to those of Medipix2 but the functionality within each pixel has been changed. In Timepix each pixel can be programmed to count hits like Medipix2, or to record Time-Over-Threshold (providing rough analog information), or to measure arrival time of the first particle to impinge on the pixel. The Timepix development was driven by the requirements for TPC readout and supported by the EUDet project.
Features:
- Pixel size 55μm x 55μm
- 256 x 256 pixels
- Single energy threshold (adjustable per pixel with 4 bits)
- Three modes of operation: (1) single particle counting (2) Time over Threshold (TOT) and (3) Time of Arrival (TOA)
- Electron or hole collection -> compatible with various sensor materials
- Can be combined with Gas Gain Grid to readout electron deposition in a gas detector
- 3-side buttable
Applications:
- Adaptive optics and other visible or near visible light applications
- Astrophysics
- Background radiation monitoring
- Digital Autoradiography
- Dosimetry
- Education
- Electron microscopy
- Life Sciences
- Neutron imaging
- Various X-ray and gamma-ray imaging applications
- X-ray polarimetry measurements
General | |
---|---|
CMOS technology | 0.25μm |
Pixel size | 55μm x 55μm |
Pixel matrix | 256 x 256 |
Design | CERN |
Analog front end (pixel cell) | |
---|---|
Positive and negative signal polarity | |
Leakage current | -10nA to +20nA |
Time to peak | 100ns |
Noise | 100 e- rms |
Threshold variation (after tuning) | 35 e- rms |
Minimum operating treshold | 700 e- |
Digital part (pixel cell + periphery) | |
---|---|
1 counter / shift register | 14 bits (stops at 11810 counts) |
Periphery |
13 8-bit DACs to set voltages in the chip Serial raedout 1-bit LVDS Parallel readout 32-bit CMOS Readout time in serial mode (100 MHz clock): 9μs Readout time in parallel mode (100 MHz clock): 266μs |
Total analog power consumption (nominal conditions) | 440mW |
Total digital power consumption (@100MHz) | 450mW |